OnTrak DSS 200 Series 2 double-sided PVA scrubber Wafer/Substrate Cleaning Equipment G&P 412S post-CMP cleaning tool Wafer/Substrate Cleaning Equipment OnTrak DSS 200 Series 1 double-sided PVA scrubber Wafer/Substrate Cleaning Equipment OnTrak Synergy post-CMP double sided scrubber Wafer/Substrate Cleaning Equipment

Wafer/Substrate Cleaners

One of the primary requirements of IC manufacturing is the quest to eliminate surface defects. The residual defectivity following the CMP process, sometimes referred to as “killer defects” hits fab yield hard. Slurry particles must be removed with a combination of chemical cleaning and agitation or scrubbing action, which is provided by very soft PVA brushes while the wafer rotates within the isolated brush boxes.

Wafers are held by edge grip mechanical arms during the cleaning process for edge-only contact, and are rinsed with D.I. water and sometimes an added chemical. Megasonic water dispensing in an isolated spin-rinse-dry area also enhances the cleaning experience. The wafers are put through a drying station and are placed in the receive cassette clean, and dry and ready for down-stream processing.

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Axus Technology partners with top industry research leaders on the production of an innovative single-chip device for the PNT market.

Chandler, Arizona, USA, – Axus Technology (Axus), a leading global provider of CMP, wafer thinning and wafer surface processing solutions for semiconductor applications, is excited to be partnering with GE Research, GE Aviation Systems, and InertiaWave, Inc. on the production of an innovative single-chip device. SEMI, through their MEMS & Sensors Industry Group (MSIG) and FlexTech Group has provided a great opportunity and platform to tackle PNT’s (Positioning, Navigation, and Timing) challenges with innovative solutions for GPS-denied environments.



Axus/Plessey Partnership

Axus partners with Plessey Semiconductors to help bring high-performance GaN-on-Silicon monolithic microLED technology to the mass market.

Using tooling from Axus and optimised processes, Plessey Semiconductors has achieved a successful wafer to wafer bond of a 1080p microLED display 0.26” diagonal to a 3-micron pixel-pitch backplane. Much smaller than the 0.7" diagonal 8-micron pixel-pitch active-matrix display previously demonstrated.



Axus Partners with CP Display to Accelerate Monolithic 1080p MicroLED Displays to Mainstream AR

Axus partners with Compound Photonics US Corporation to accelerate sub 5 µm pixel microLED development to the mass market.

Axus and CP are partnering to integrate critical wafer-scale processes needed for mass-production scale up of CP’s 3 µm pixel, 0.26” diagonal, 1080p microLED displays for the next generation AR glasses. Specifically, Axus will deploy its state-of-the-art Capstone CMP system with integrated post-CMP clean to enable wafer planarization and surface preparation process solutions for successful wafer-scale bonding of microLED wafers to high-performance CMOS backplanes.


7001 W. Erie St. Suite 1, Chandler, AZ 85226
(480) 705-8000