Membrane carriers are an industry proven, widely used technology offering low consumables cost and efficient maintainability. Axus designed carriers can be retrofitted onto existing CMP tools, significantly enhancing tool performance and reliability.
The Axus Crystal carrier is designed for ultra thin and fragile wafer handling with the 4 pressure zone benefits of the Avalon. With over 50% less wafer deflection during wafer handling than the legacy 4 zone carriers, the Crystal enables a greater range of wafer substrate thickness and materials while reducing the breakage risk. For heterogeneous integration, III/V materials and advanced TGV processing, the Crystal is the only carrier designed for success.
STANDARD FEATURES INCLUDE:
- The 4 pressure zone Crystal carrier has been designed for handling thin and fragile wafers (III-V materials) to reduce the wafer edge non-uniformity.
- The Crystal carrier offers significantly lower WIW uniformity than the legacy carriers using rigid plates.
- Membrane carriers have a large install-base in the CMP industry:
- Used on over 1,000 CMP tools for 200mm and 300mm
- Approximately 10,000 heads installed worldwide
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Axus Partners with CP Display to Accelerate Monolithic 1080p MicroLED Displays to Mainstream AR
Axus partners with Compound Photonics US Corporation to accelerate sub 5 µm pixel microLED development to the mass market.
Axus and CP are partnering to integrate critical wafer-scale processes needed for mass-production scale up of CP’s 3 µm pixel, 0.26” diagonal, 1080p microLED displays for the next generation AR glasses. Specifically, Axus will deploy its state-of-the-art Capstone CMP system with integrated post-CMP clean to enable wafer planarization and surface preparation process solutions for successful wafer-scale bonding of microLED wafers to high-performance CMOS backplanes.
Axus partners with Plessey Semiconductors to help bring high-performance GaN-on-Silicon monolithic microLED technology to the mass market.
Using tooling from Axus and optimised processes, Plessey Semiconductors has achieved a successful wafer to wafer bond of a 1080p microLED display 0.26” diagonal to a 3-micron pixel-pitch backplane. Much smaller than the 0.7" diagonal 8-micron pixel-pitch active-matrix display previously demonstrated.